IIT Gandhinagar Junior Research Fellow Recruitment 2026

IIT Gandhinagar is hiring 1 Junior Research Fellow for a sponsored research project in the Electrical Engineering department. If you have a postgraduate degree in Basic Science (or a graduate plus postgraduate degree in a professional course), selected through NET, GATE, or an equivalent national-level exam, you can apply online. The last date to apply is 11 August 2026. The position pays a consolidated salary of Rs. 46,990 per month (including HRA) for a duration of 1 year, extendable.

Indian Institute of Technology Gandhinagar (IIT Gandhinagar) Junior Research Fellow Recruitment 2026 - 1 Post

IIT Gandhinagar has released a notification for 1 Junior Research Fellow post (Advertisement No. SPON/63038/Advt0287, dated 4 August 2026) under a sponsored project titled "NSF-MeitY: Fundamental Realizable Limit Vibration Energy Harvesting: Design, Analysis, and Implementation", led by Prof. Madhav Pathak in the Electrical Engineering department. This is a jointly funded project between the US National Science Foundation (NSF) and India's Ministry of Electronics and Information Technology (MeitY), which makes it a well-resourced research opportunity. The work involves analog and mixed-signal circuit design and simulation for a low-power energy harvesting system — a strong fit if you enjoy hands-on lab work combined with circuit simulation. Fresh postgraduates and NET/GATE-qualified candidates interested in analog IC design research are encouraged to apply.

Who Can Apply?

• Qualification: You need a Post Graduate degree in Basic Science, OR a Graduate plus Post Graduate degree in a Professional Course, selected through any one of the following: (a) National Eligibility Tests such as CSIR-UGC NET (including lectureship/Assistant Professorship) and GATE, or (b) a national-level exam conducted by Central Government departments and their agencies/institutions such as DST, DBT, DAE, DOS, DRDO, MoE, ICAR, ICMR, IIT, IISc, IISER, or NISER.
• Desirable Qualification: An M.Tech/ME or B.Tech/BE in Electronics or Electrical Engineering (or an equivalent stream) is preferred.
• Desirable Skills: Proficiency with analog and mixed-signal IC design, hands-on experience with circuit simulation tools like Cadence Virtuoso or equivalent, familiarity with basic lab equipment such as a DMM and Oscilloscope, and prior layout experience will all be an added advantage.
• Job Description: The selected candidate will work on analog and mixed-signal circuit design and simulation for a low-power energy harvesting system.

Salary

• You will get a consolidated monthly remuneration of Rs. 46,990 per month, which includes a House Rent Allowance (HRA) of Rs. 9,990 per month.
• The appointment is for a duration of 1 year, extendable based on project requirements and your performance.

Selection Process

Selection will involve the following steps:

1. Screening of Applications: Your educational qualifications and experience will be checked against the eligibility norms described above.
2. Shortlisting and Selection Test/Interview: Shortlisted candidates will be called for further evaluation, which may include a written test or interview. Note that merely meeting the minimum eligibility criteria will not guarantee shortlisting or appointment — a higher cutoff may be applied, and the Institute is not obligated to call every eligible applicant.

How to Apply

1. Go to the IIT Gandhinagar project staff recruitment portal at recruitment.iitgn.ac.in/projectstaff.
2. Find the listing for Junior Research Fellow under Prof. Madhav Pathak, Electrical Engineering.
3. Fill in your personal, educational, and experience details in the online application form.
4. Upload your certificates and supporting documents as required.
5. Submit the form before the deadline.

For project-related queries, you can contact Prof. Madhav Pathak at madhav.pathak@iitgn.ac.in.

Important Dates

• Notification Date: 4 August 2026
• Last Date to Apply Online: 11 August 2026

• Design and simulate analog and mixed-signal integrated circuits for the vibration energy harvesting project
• Use circuit simulation tools such as Cadence Virtuoso for circuit analysis and validation
• Operate lab equipment including a DMM and Oscilloscope for testing and measurement
• Support IC layout design tasks related to the project
• Document experimental results and prepare technical progress reports
• Assist Prof. Madhav Pathak and the project team in achieving research deliverables
• Coordinate with collaborators under the NSF-MeitY funded project