SETS Project Associate SCA PQC Recruitment 2026
Society for Electronic Transactions and Security (SETS) - Cybersecurity Research and Development Project
Published Source: Official Notification Report an error
Vacancy
1
Salary
₹50,000 - ₹60,000
Job Type
Contract
Full time
Apply By
15 Sep 2026
About This Job
Apply for 1 Project Associate post in SETS. M.Tech/ME/MS by Research with 60% eligible. Salary: Rs. 50,000-60,000. Last date: 15 Sep 2026.
SETS Project Associate SCA PQC Recruitment 2026: Overview
Society for Electronic Transactions and Security (SETS) is hiring a Project Associate (Hardware) for a cybersecurity research and development project at its Chennai centre. SETS works across cryptology, secure computing, hardware security, quantum security and network security, so this assignment sits inside a specialised national research environment. The role is especially suited to someone who enjoys moving between FPGA implementation, simulation and cryptographic hardware analysis rather than working only on conventional software. The post code is 26-PA-18, under Advertisement No. SETS/Chn/Rec/Proj/2026-27/67.
Service Conditions and Caveats
- Project engagement: This is a purely temporary, project-mode contract and does not create any right to regular appointment or absorption at SETS.
- Initial tenure: The assignment begins for one year. An extension depends on the project's need and your performance, so continuation is not automatic.
- Shortlisting: Meeting the basic requirements does not guarantee a call. SETS may shortlist applicants after comparing their qualifications, skills and relevant work.
- Assessment venue: Shortlisted applicants may need to attend the assessment at SETS, Chennai; the schedule will be shared by email.
- Travel support: SETS will not pay TA or DA for attending the interview or related assessment.
- Original records: If shortlisted, you must carry your original testimonials for verification on the interview day.
- Hiring discretion: SETS may increase or reduce its requirement, cancel the advertisement, or decide not to fill the role.
Application Submission Notes
The application route is the role-specific Google Form linked by SETS. Keep the signed Personal Particulars Form ready in PDF format; SETS provides that form through its careers page. Your academic records must be combined into one scanned PDF, and your experience records should be combined into a separate single PDF.
Check that the Personal Particulars Form is complete and signed before uploading it. SETS says incomplete forms or applications without the supporting certificates can be rejected. Use an email address you monitor regularly because assessment details will be sent by email, and keep the uploaded files readable so they can be checked without delay.
Responsibilities
- Develop and test FPGA designs using VHDL or Verilog
- Run hardware simulations with Xilinx Vivado, MATLAB or ModelSim
- Implement cryptographic functions on FPGA platforms
- Analyse hardware security and side-channel behaviour
- Write supporting programs in C, C++ and Python
- Review digital designs against cryptographic standards
Eligibility Criteria
Minimum Qualification
M.Tech, ME or MS by Research in Embedded Systems, Communication Systems, VLSI Design, Electronic Engineering, Cybersecurity or equivalent with at least 60% marks
Required Skills
Xilinx Vivado; MATLAB or ModelSim simulation; FPGA implementation using VHDL/Verilog; C/C++ and Python; digital electronics; hardware security and side-channel analysis; post-quantum cryptography; cryptographic standards
Age Limit
18 - 35 years (as on 15 Sep 2026)
Experience
Freshers can apply
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Salary & Compensation
Pay Scale
Consolidated salary of Rs. 50,000 to Rs. 60,000 per month; an additional increment may be considered based on skill set and relevant experience
Selection Process
- 1 Written Exam
- 2 Interview
- 3 Document Verification
Exam Pattern
SETS may shortlist you for a written test and/or interview at Chennai. The notification does not specify the number of questions, marks, duration, subjects or negative marking.
Assessment schedule: Shortlisted applicants will receive the date and time by email.
Additional Requirements
Computer Knowledge Required
How to Apply
Application Mode: Online
Click the "Apply Now" button to visit the official application portal.
Required Documents:
- Signed Personal Particulars Form in PDF format
- Academic certificates combined into one scanned PDF
- Experience certificates combined into one scanned PDF
- Original testimonials for verification if shortlisted
Frequently Asked Questions
The last date is 15 September 2026 before 6:00 PM. Make sure your form and supporting PDFs are uploaded before the cut-off.
You need an M.Tech, ME or MS by Research with at least 60% marks in one of the listed electronics, embedded systems, VLSI, communication or cybersecurity disciplines, or an equivalent qualification.
You must apply through the role-specific Google Form and upload the signed Personal Particulars Form plus the required certificate PDFs.
The consolidated salary is Rs. 50,000 to Rs. 60,000 per month. SETS may consider an additional increment based on your skills and relevant experience.
Shortlisted applicants may face a written test and/or interview at SETS, Chennai, followed by checking of original testimonials.
Important Dates
Notification
02 Sep 2026
Last Date to Apply
15 Sep 2026
Job Locations
Categories
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