IITGN JRF Recruitment 2026

About This Job

IITGN is hiring 1 Junior Research Fellow (JRF) in the Electrical Engineering department for a sponsored research project. If you have an M.Tech/ME or B.Tech/BE background in Electrical, Electronics, or an equivalent engineering stream with the required national-level eligibility route, you can apply online. The IITGN staff page lists the last date as 23 June 2026. Salary is a consolidated Rs. 46,990 per month, including Rs. 9,990 HRA.

Indian Institute of Technology Gandhinagar JRF Recruitment 2026 - 1 Post

Indian Institute of Technology Gandhinagar (IIT Gandhinagar or IITGN) has issued Advertisement No. SPON/63038/Advt0233 dated 15 June 2026 through its Research and Development Office. The post is for a temporary Junior Research Fellow under Prof. Madhav Pathak in the Electrical Engineering department. The project title is NSF-MeitY: Fundamental Realizable Limit Vibration Energy Harvesting: Design, Analysis, and Implementation.

This is a project-funded research role, not a permanent institute post. The appointment duration mentioned in the notice is 1 year. The work is suitable for candidates interested in analog and mixed-signal circuit design, low-power systems, vibration energy harvesting, and circuit simulation tools.

Who Can Apply?

Essential Qualification

• Qualification route: You need a Post Graduate Degree in a Professional Course or a Graduate Degree in a Professional Course selected through a recognised national-level examination.
• Accepted national-level routes: The notice mentions CSIR-UGC NET, GATE, or national-level examinations conducted by Central Government departments, agencies, and institutions.
• Examples of accepted bodies: The notification lists examples such as DST, DBT, DAE, DOS, DRDO, MHRD, ICAR, ICMR, IIT, IISc, and IISER.
• Norms: Eligibility follows funding agency norms, so your degree and qualifying examination proof should clearly support your claim.

The wording in the notice is important because the degree alone may not be enough. You should keep proof of your GATE, NET, or other national-level selection ready before filling the Google Form. If your qualifying route is through another government department or institute exam, mention it clearly in your application.

Desirable Qualification and Skills

• Preferred degree: M.Tech/ME or B.Tech/BE in Electronics, Electrical, or an equivalent engineering stream.
• Design skill: Proficiency with analog and mixed-signal IC design is desirable.
• Simulation tools: Experience with Cadence Virtuoso or an equivalent circuit simulation tool is useful.
• Lab exposure: Familiarity with basic lab equipment such as DMM and oscilloscope is desirable.
• Layout exposure: Experience with layout will be an added advantage.

These desirable skills show the role is strongly linked to circuit design and simulation. If you have worked on IC design, mixed-signal systems, lab measurements, or low-power circuit projects, describe that experience in simple and specific terms. A focused CV can help the PI understand your fit for the energy harvesting system project.

Age Limit

• The official PDF marks age limit as N/A.
• No minimum age, maximum age, or age relaxation rule is separately mentioned in the notice.

Salary

• Consolidated salary: Rs. 46,990 per month.
• HRA included in the salary: Rs. 9,990 per month.
• HRA rate mentioned in the notice: 27%, payable as per IITGN norms.
• Pay nature: project consolidated salary, not a regular pay-matrix salary.

The salary figure in the notification already includes House Rent Allowance. Since this is a sponsored project post, treat it as a temporary research appointment. The notice does not mention separate DA, TA, or other regular government allowances.

Selection Process (No Written Exam Pattern Given)

The official notice does not publish a written exam pattern, marks scheme, or interview date. Selection is expected to be handled through IITGN project recruitment screening based on the form and project fit.

1. Online Application: You submit your details through the official Google Form linked in the notice.
2. Shortlisting: IITGN may check your degree, national-level eligibility route, and relevance to analog/mixed-signal circuit design.
3. Interview or Discussion: Shortlisted candidates may be contacted by the institute or project team for the next stage.
4. Document Check: Keep your degree certificates, mark sheets, GATE/NET or equivalent proof, CV, and experience details ready.

No separate exam syllabus is given in the PDF. Prepare to explain your work in circuit design, simulation tools, lab equipment, and any project related to low-power electronics or energy harvesting.

How to Apply

1. Open the official application form at forms.gle/k3s42qrfWVKZdDFUA.
2. Read the IITGN staff-opening row for Junior Research Fellow - Electrical Engineering.
3. Fill in your personal, academic, and professional-course details carefully.
4. Add details of your GATE, NET, or other national-level selection wherever asked.
5. Upload or mention your CV, project experience, and circuit-design skills as required in the form.
6. Submit the form before 23 June 2026.

Use the exact post details from the notice while applying: Junior Research Fellow (JRF), PI Prof. Madhav Pathak, department Electrical Engineering, and Advertisement No. SPON/63038/Advt0233. This helps you avoid selecting the wrong IITGN project opening.

Important Dates

• Advertisement Date: 15 June 2026
• Posting Date on IITGN Staff Page: 16 June 2026
• Application Start: 16 June 2026
• Last Date to Apply Online: 23 June 2026
• Interview Date: To be announced

• Design and simulate analog and mixed-signal circuits for the research project
• Work on low-power vibration energy harvesting system concepts
• Use circuit simulation tools such as Cadence Virtuoso or equivalent software
• Handle basic laboratory measurements using DMM, oscilloscope, and related equipment
• Maintain simulation files, lab observations, and research data in an organised manner
• Assist the PI with project reports, technical documentation, and research outputs