SVNIT Surat JRF Recruitment 2026 — 2 Vacancies

About This Job

Sardar Vallabhbhai National Institute of Technology (SVNIT), Surat has released a notification for 2 Junior Research Fellow (JRF) posts in the Department of Electronics Engineering. These positions are for a MeitY-sponsored project on AI Accelerator Chip design. You can earn up to Rs. 44,400 per month (including HRA). The last date to apply is 14 April 2026. You need a B.E./B.Tech./M.E./M.Tech. in Electronics or ECE with a valid GATE or CSIR-UGC NET score.

SVNIT Surat JRF Recruitment 2026 — 2 Posts

SVNIT Surat, a premier National Institute of Technology under the Ministry of Education, Government of India, is hiring research staff for a cutting-edge project titled "Secure and Energy Efficient Mixed Domain Compute in Memory-based AI Accelerator Chip for Edge Applications". This project is funded by the Ministry of Electronics & Information Technology (MeitY) under the Chips to Startup (C2S) programme. The contract is initially for 1 year and can be extended yearly for up to 5 years.

Vacancy Breakdown

The recruitment is for a maximum of 02 posts of Research Personnel. The positions will be filled in the following priority order:

• Junior Research Fellow (JRF) — 02 Posts (primary recruitment)
• Project Associate-II (PA-II) — Max 02 Posts (only if suitable JRF candidates are not available)
• Project Associate-I (PA-I) — Max 02 Posts (only if suitable JRF/PA-II candidates are not available)

Note: The total number of posts across all three categories is 02 — not 06. PA-II and PA-I are fallback options if JRF positions cannot be filled.

Who Can Apply?

Junior Research Fellow (JRF)

• Qualification: B.E. / B.Tech. / M.E. / M.Tech. in Electronics, Electronics & Communication, or equivalent
• Mandatory: Must have qualified CSIR-UGC NET or GATE
• Minimum CGPA: 6.5 (or First Class) in all qualifying degrees
• Candidates with relevant research experience will get preference

Project Associate-II (PA-II) — Fallback

• Qualification: B.E. / B.Tech. in Electronics, ECE, or equivalent
• Experience: 2 years in Research & Development in academic/industrial/scientific organizations
• CGPA: Minimum 6.5 (or First Class) in all qualifying degrees

Project Associate-I (PA-I) — Fallback

• Qualification: B.E. / B.Tech. in Electronics, ECE, or equivalent
• CGPA: Minimum 6.5 (or First Class) in all qualifying degrees

Desired Skills (All Posts)

• Digital / Analog / Mixed Mode Circuit Design, HDL Coding
• In-Memory Computing
• AI/ML and Processor Architecture
• Python / MATLAB
• Knowledge of OS (Windows / Linux / CentOS / RHEL), Server handling, Cadence / Synopsys / Mentor Graphics EDA tools

Age Limit

• JRF: As per DST OM DST/PCPM/Z-06/2022 dated 26/06/2023 (generally up to 28 years with standard relaxations for reserved categories)
• PA-II and PA-I: Upper age limit is 35 years as per DST OM SR/S9/Z-05/2019 dated 10/07/2020

Salary

• JRF: Rs. 37,000 per month + HRA @ 20% = Total Rs. 44,400/month
• PA-II (with GATE/NET): Rs. 35,000 per month + HRA @ 20% = Total Rs. 42,000/month
• PA-II (without GATE/NET): Rs. 28,000 per month + HRA @ 20% = Total Rs. 33,600/month
• PA-I (with GATE/NET): Rs. 31,000 per month + HRA @ 20% = Total Rs. 37,200/month
• PA-I (without GATE/NET): Rs. 25,000 per month + HRA @ 20% = Total Rs. 30,000/month

The position is on a purely contract basis for an initial period of 12 months, extendable on yearly review up to the project duration of 5 years.

Application Fee

• No application fee is mentioned in the notification

Selection Process

1. Screening of Applications — Your application, qualifications, and experience will be reviewed against the eligibility criteria
2. Shortlisting — Names of eligible candidates will be uploaded on the SVNIT website on 15 April 2026
3. Online Interview — Shortlisted candidates will be interviewed online on 17 April 2026 (final date/venue may be communicated separately)
4. Document Verification — You must bring original and photocopies of all relevant documents at the time of interview

Note: No written exam — selection is merit-based through interview. No TA/DA will be paid for the interview.

How to Apply

1. Download the application form from www.svnit.ac.in
2. Fill in and sign the application form
3. Scan your B.E./B.Tech./M.E./M.Tech./Ph.D. marksheets (all semesters), experience certificates, and other necessary documents
4. Combine everything — the filled application form and all documents — into a single PDF file
5. Email the single PDF to pje@eced.svnit.ac.in on or before 14 April 2026
6. You can also submit via the online link: https://tinyurl.com/c2sprojectstaffsvnit-032026

Important: Applications received after 14 April 2026 will not be considered. If you are currently employed, you need a No Objection Certificate (NOC) from your employer at the time of interview.

Important Dates

• Notification Date: 01 April 2026
• Last Date to Apply: 14 April 2026
• Eligible Candidates List on Website: 15 April 2026
• Online Interview Date: 17 April 2026
• Result: Within one week after the interview

Bonus: Selected candidates may also get the opportunity to enroll for M.Tech. / Ph.D. programmes at SVNIT Surat, subject to meeting eligibility conditions.

• Work on the design and development of secure and energy-efficient AI accelerator chip architectures for edge applications
• Handle digital, analog, and mixed-mode circuit design tasks using industry-standard EDA tools like Cadence, Synopsys, and Mentor Graphics
• Assist in developing compute-in-memory based architectures for AI and machine learning workloads
• Prepare research documentation, technical reports, and contribute to research publications
• Follow project timelines and milestones set by the Chief Investigator and MeitY guidelines
• Manage server infrastructure, operating systems, and network file systems used in the project
• Work with Python and MATLAB for simulation, data analysis, and algorithm development