यह पृष्ठ अभी हिन्दी में उपलब्ध नहीं है — अंग्रेज़ी संस्करण दिखाया जा रहा है।
TIFR Project Engineer CMS Recruitment 2026

TIFR Project Engineer CMS Recruitment 2026

Tata Institute of Fundamental Research (TIFR) - Department of High Energy Physics, TIFR Mumbai

प्रकाशित स्रोत: आधिकारिक अधिसूचना त्रुटि की सूचना दें

रिक्ति

1

वेतन

₹60,000 - ₹60,000

नौकरी का प्रकार

अस्थायी

पूर्णकालिक

आवेदन की अंतिम तिथि

30 सित. 2026

इस नौकरी के बारे में

Apply for the TIFR Project Engineer vacancy. B.E./B.Tech with 60% and 1 year of circuit-design experience needed. Salary: Rs 60,000. Last date: 30 Sep 2026.

TIFR Project Engineer CMS Recruitment 2026: Overview

Tata Institute of Fundamental Research (TIFR), an autonomous institution under the Department of Atomic Energy, is hiring a Project Engineer for its Department of High Energy Physics in Mumbai. The role supports India's participation in the CMS experiment at CERN, with work centred on the electronics that collect and move data from particle detectors. This is a hands-on engineering assignment where your circuit designs, firmware and test work will connect directly with a major international physics collaboration.

The post sits between experimental physics and advanced electronics. You will work with physicists and engineers on detector readout systems rather than a general campus-maintenance project. The strongest fit is someone comfortable moving from simulation and PCB design to laboratory debugging and live detector support.

Service Conditions and Caveats

  • Project tenure: The appointment is temporary for an initial period of one year. It may be extended for up to another two years when performance and project needs support an extension.
  • Employment status: The appointment is non-pensionable and does not create a claim to another temporary or permanent post at TIFR during or after the project.
  • Operational support: The CMS detector work can include on-call hardware support, so you should be ready to diagnose faults and coordinate with the wider technical team when systems are in operation.
  • Engineering environment: The work spans mixed-signal electronics, detector data acquisition, embedded processors and high-speed links. You may need to shift between design tools, bench testing and collaboration meetings as the project moves through maintenance and upgrade tasks.

Application Submission Notes

Send your application by email to rajdeep.chatterjee@tifr.res.in and shilpi.jain@tifr.res.in. Use the subject "Application for Project Engineer (Name of the candidate)" so the project team can identify your application correctly.

Your CV must follow the format specified in Advertisement No. 2026/26. It should cover personal details, academic history in the requested table, the qualifying degree record and contact details for two referees. Add a brief statement that connects your practical electronics experience to the detector-readout work described in the notice.

Keep the CV focused: the notice asks applicants not to add extra information or pages outside the prescribed format. Attach copies of relevant certificates and make sure the experience statement clearly explains your work with analog, digital or VLSI circuits, firmware, PCB bring-up or comparable high-speed systems.

जिम्मेदारियाँ

  • Design, simulate and debug low-noise analog front-end circuits for particle-detector readout
  • Develop and validate high-speed digital and VLSI systems using CPLDs and FPGAs
  • Write and maintain Verilog or VHDL firmware for FPGA-based readout systems
  • Implement and test high-speed data links used for detector data acquisition
  • Program soft processors embedded in FPGA-based systems
  • Collaborate with physicists and engineers on PCB design, layout and board bring-up
  • Support CMS detector operations and handle on-call hardware maintenance

पात्रता मानदंड

न्यूनतम योग्यता

B.E./B.Tech in Electronics Engineering or Electronics and (Tele)Communications Engineering with at least 60% aggregate marks

वांछित योग्यता

Familiarity with particle-detector data acquisition, end-to-end PCB electronics design, and Verilog or the Vivado design suite

आवश्यक कौशल

Low-noise analog circuit design; ADCs and power management; FPGA/CPLD synthesis, timing closure and simulation; Verilog/VHDL; Vivado or Quartus; LVDS, GbE, PCIe or similar serial links; Altium or KiCad; mixed-signal board bring-up

आयु सीमा

18 - 29 वर्ष (30 सित. 2026 तक)

अनुभव

1.0 - कोई सीमा नहीं वर्ष

क्या मैं पात्र हूँ?

इस नौकरी की आयु एवं योग्यता के आधार पर त्वरित स्व-जाँच। यह केवल संकेतात्मक है — पुष्टि हमेशा आधिकारिक अधिसूचना से करें।

✓ आप पात्र प्रतीत होते हैं ⚠ सीमारेखा पर — आयु में छूट देखें ✗ आप पात्र नहीं हो सकते

  • आप न्यूनतम आयु () से कम हैं।
  • आप अधिकतम आयु () से अधिक हैं।
  • सामान्य आयु सीमा () से अधिक, लेकिन आरक्षित वर्ग की छूट ( तक) के अंतर्गत आप पात्र हो सकते हैं।
  • इस पद के लिए चयनित योग्यता से अधिक योग्यता आवश्यक है।
  • योग्यता की स्वतः जाँच नहीं हो सकी — ऊपर दिए गए मानदंड देखें।

महाराष्ट्र में अनुसंधान नौकरियाँ पाएँ

एक टैप। मेल खाती अधिसूचना प्रकाशित होते ही सूचना पाएँ।

✓ आपको ये अलर्ट मिलेंगे।

वेतन एवं भत्ते

वेतनमान

Comprehensive monthly salary of Rs. 60,000

चयन प्रक्रिया

  1. 1 साक्षात्कार

अतिरिक्त आवश्यकताएँ

कंप्यूटर ज्ञान आवश्यक

आवेदन कैसे करें

आवेदन का माध्यम: ऑफ़लाइन

आधिकारिक आवेदन पोर्टल पर जाने के लिए "अभी आवेदन करें" बटन पर क्लिक करें।

आवश्यक दस्तावेज़:

  • Detailed CV in the format prescribed in Advertisement No. 2026/26
  • Final marksheet and/or degree certificate for the eligible degree
  • Copies of relevant certificates
  • Brief statement of relevant experience
  • Academic history in the prescribed table format
  • Names, email addresses and contact numbers of two referees

अक्सर पूछे जाने वाले प्रश्न

The last date for TIFR to receive your email application is 30 September 2026. Send the complete CV and attachments before the deadline.

The post carries a comprehensive monthly salary of Rs. 60,000.

You need a relevant B.E./B.Tech with at least 60% marks and a minimum of one year of hands-on high-speed circuit-design and debugging experience.

Email the prescribed CV, certificates and experience statement to the two project contacts named in the notice. Use "Application for Project Engineer (Name of the candidate)" as the subject.

TIFR will select the Project Engineer through a personal interview.

समान नौकरियाँ

केंद्र सरकार शिक्षण
05 अक्टू. 1 पद

IIT Jammu Research Associate NTTM Recruitment 2026

Indian Institute of Technology Jammu (IIT Jammu)

शिक्षण अनुसंधान
30 सित. 1 पद

NIT Goa Faculty Recruitment 2026

National Institute of Technology Goa (NIT Goa)

केंद्र सरकार NIT
30 सित. 28 पद

CAU Comptroller Recruitment 2026

Central Agricultural University (CAU), Imphal

शिक्षण महाविद्यालय/विश्वविद्यालय
30 सित. 2 पद

VECC Principal Project Associate CSE 2026

Variable Energy Cyclotron Centre (VECC)

अनुसंधान शिक्षण
30 सित. 1 पद

Tata Institute of Fundamental Research (TIFR) की और नौकरियाँ

Tata Institute of Fundamental Research (TIFR) की सभी नौकरियाँ देखें →

TIFR Multi-Post Recruitment 2026

Tata Institute of Fundamental Research (TIFR)

अनुसंधान शिक्षण
15 सित. 5 पद

TIFR Project Staff Recruitment 2026

Tata Institute of Fundamental Research (TIFR)

अनुसंधान शिक्षण
15 सित. 5 पद

TIFR Professor & Reader Recruitment 2026

Tata Institute of Fundamental Research (TIFR)

शिक्षण महाविद्यालय/विश्वविद्यालय
31 दिस. 1 पद