IIT BHU JRF/SRF Recruitment 2026

IIT (BHU) Varanasi is hiring 1 Junior Research Fellow (JRF) or Senior Research Fellow (SRF) for a Technology Development Fund (TTDF) project in its Department of Electronics Engineering. If you have a B.Tech or M.Tech in Electronics and Communication Engineering, you can apply by email. Applications must reach the department within 21 days of the advertisement (by around 12 August 2026). The monthly pay ranges from Rs. 25,000 to Rs. 42,000, based on your qualification and experience.

Indian Institute of Technology (Banaras Hindu University) Varanasi (IIT BHU) JRF/SRF Recruitment 2026 - 1 Post

IIT (BHU) Varanasi has invited applications for 1 Junior Research Fellow (JRF) / Senior Research Fellow (SRF) position (Project Code: R&D/ECE/TTDF/24-25/32/677) for the research project "Empowering Sixth Sense Capabilities of Communication Network: Design and Development of Test-Bed for RIS-enabled Joint Sensing and Communication Systems", sponsored by the Technology Development Fund (TTDF) under the Department of Telecommunications (DoT), Government of India. The position is purely temporary and coterminous with the project, making it ideal for B.Tech/M.Tech graduates in Electronics and Communication Engineering who want hands-on research experience in FPGA-based communication systems.

The Principal Investigator, Dr Atul Kumar, Assistant Professor in the Department of Electronics Engineering, has the discretion to restrict the number of candidates called for interview to a reasonable limit, based on qualifications and experience higher than the minimum prescribed. Only shortlisted candidates will be contacted for the interview — no other communication in this regard will be entertained, so keep an eye on your email.

Who Can Apply?

For Senior Research Fellow (SRF):

• If you have an M.Tech: First class M.Tech and B.Tech in Electronics and Communication Engineering (or an allied discipline), plus 2 years of research experience.
• If you have only a B.Tech: First class B.Tech in Electronics and Communication Engineering (or an allied discipline), plus 2 years of research experience.

For Junior Research Fellow (JRF):

• First class B.Tech in Electronics and Communication Engineering (or an allied discipline).

Desirable Skills:

• Strong knowledge of VHDL/Verilog for digital communication system design.
• Strong knowledge of FPGA-based communication system design and implementation.
• Hands-on experience with AMD/Xilinx FPGA platforms (ZCU702, ZCU102, ZCU208, RFSoC boards).
• Proficiency in AMD Vivado Design Suite, Vitis, and FPGA debugging tools.

Age and Age Relaxation: As per the Institute's Annexure IV norms — check the official notification for details.

Salary

• You will get a monthly fellowship of Rs. 25,000 to Rs. 42,000, depending on your qualification and experience.
• HRA will be paid as per applicable norms.

Selection Process

The selection will be done in the following stages:

1. Shortlisting: The Principal Investigator will shortlist candidates based on qualifications and experience higher than the minimum prescribed in the advertisement.
2. Personal Interview: Only shortlisted candidates will be contacted for the interview. No TA/DA will be paid for attending.
3. Document Verification: You must bring all original documents to the interview for verification, if shortlisted.

Note: If selected, you are expected to join the project immediately. All other relevant guidelines of the funding agency (TTDF/DoT) and Government of India rules will apply.

How to Apply

1. Prepare a single PDF containing your filled application form, qualification certificates, marksheets, experience certificate, age proof, and caste certificate (if applicable).
2. Email the PDF to icclab.iitbhu@gmail.com with a CC to atul.ece@iitbhu.ac.in.
3. Use the subject line: "Empowering Sixth Sense Capabilities of Communication Network: Design and Development of Test-Bed for RIS-enabled Joint Sensing and Communication Systems".
4. No hard copy is required — carry original documents only if shortlisted for interview.
5. For any queries, contact Dr Atul Kumar (Principal Investigator) at atul.ece@iitbhu.ac.in.

Important Dates

• Last Date to Apply: Within 21 days of the advertisement (around 12 August 2026)

• Design and develop RIS-enabled joint sensing and communication test-beds
• Implement digital communication systems using VHDL/Verilog
• Configure and test FPGA-based communication systems on AMD/Xilinx platforms
• Debug and optimize designs using AMD Vivado and Vitis tools
• Document experimental results and prepare project reports
• Assist the Principal Investigator with project deliverables and milestones
• Coordinate with the sponsoring agency (TTDF/DoT) on project progress