SETS Project Associate ANVAYAM Recruitment 2026

SETS Project Associate ANVAYAM Recruitment 2026: Overview

Society for Electronic Transactions and Security (SETS) is recruiting Project Associates for SETS ANVAYAM at its Chennai centre under a cybersecurity research and development project. This hardware-focused assignment connects FPGA implementation with digital electronics, security analysis, PCB work and high-speed interfaces. It is a good match if you like taking a design from simulation and coding through debugging and hardware review instead of staying within a single engineering activity. The post code is 26-PA-20, under Advertisement No. SETS/Chn/Rec/Proj/2026-27/69.

Service Conditions and Caveats

• Project contract: The engagement is purely temporary and project-based. It gives no claim to regularisation, permanent absorption or continued work at SETS.
• Initial term: The assignment starts with a one-year tenure. Any extension depends on the project's need as well as your performance.
• Shortlisting rule: Meeting the basic academic requirements does not automatically secure an assessment call; SETS will decide whom to shortlist.
• Assessment place: Shortlisted applicants may have to attend the assessment at SETS, Chennai, and the organisation will communicate the schedule by email.
• Travel cost: No TA or DA will be paid for attending the interview or related assessment.
• Record checking: If you are shortlisted, bring all original testimonials for verification on the interview day.
• Requirement changes: SETS may increase or reduce its hiring requirement, cancel the process, or decide not to fill a position.

Application Submission Notes

The official application route is the Google Form linked specifically for SETS ANVAYAM. You will need the signed Personal Particulars Form as a PDF, one combined scanned PDF containing academic certificates and a separate combined PDF for experience certificates. SETS hosts the Personal Particulars Form through its careers page.

Review the completed and signed form before uploading it, and make sure every supporting scan opens clearly. SETS can reject an incomplete Personal Particulars Form or a submission without the required records. Provide an email address you check often because shortlisting and assessment details will be communicated by email, and retain your original records for the interview day.

• Develop FPGA designs using VHDL or Verilog
• Simulate hardware with Xilinx Vivado, MATLAB or ModelSim
• Debug FPGA implementations with tools such as ILA
• Write supporting programs in C, C++ and Python
• Review PCB and digital hardware designs for security issues
• Work with SPI, I2C, UART, PCIe and similar interfaces
• Analyse hardware security and side-channel behaviour