IIEST Project Associate VLSI Recruitment 2026
Indian Institute of Engineering Science and Technology, Shibpur (IIEST Shibpur) - School of VLSI Technology
प्रकाशित स्रोत: आधिकारिक अधिसूचना त्रुटि की सूचना दें
रिक्ति
1
वेतन
₹30,000 - ₹30,000
नौकरी का प्रकार
संविदा
पूर्णकालिक
आवेदन की अंतिम तिथि
09 सित. 2026
इस नौकरी के बारे में
Apply for 1 Project Associate VLSI post at IIEST Shibpur. M.Tech with experience eligible. Salary: Rs 30,000. Walk-in: 9 Sep 2026.
IIEST Project Associate VLSI Recruitment 2026: Overview
Indian Institute of Engineering Science and Technology, Shibpur (IIEST Shibpur) is selecting a Project Associate-I for the School of VLSI Technology. The role belongs to a sponsored research project on a system-on-chip platform for next-generation Internet of Things use in Industry 4.0, with functional safety and security built into the design. The project is supported through the Chip to Startup programme of the Ministry of Electronics and Information Technology, making this a hands-on semiconductor research opportunity rather than a general campus administration post.
Your background should connect directly with analog and mixed-signal design. The desirable areas named in the notice include FPGA work, coding, chip tape-out and integrated-circuit testing, so the panel can look beyond the degree certificate and ask what you have actually designed, simulated, programmed or tested. A concise portfolio of project work, publications, tape-out exposure or laboratory results can help you explain that experience clearly at the walk-in.
Service Conditions and Caveats
- Project-linked tenure: The engagement is planned for two years or until the sponsored project finishes, whichever condition governs the project. It does not create a claim to a permanent institute post.
- Yearly review: Continuation is subject to an annual evaluation of your contribution to project execution, so progress, documentation and dependable laboratory work will matter after selection.
- Technical focus: The work sits within the School of VLSI Technology and centres on an SoC-based IoT system for industrial use, including functional-safety and security concerns.
- Document accuracy: The institute will verify records at joining and can cancel the selection if it finds a discrepancy. Make sure the experience claimed in your bio-data matches your certificates.
- Communication: Your application letter and bio-data must carry a valid email address and phone number so the project team can contact you after the interview.
- Travel costs: The institute will not pay TA or DA for attending the walk-in, so you need to arrange and fund your travel to Shibpur.
Application Submission Notes
This is a walk-in interview at the School of VLSI Technology, IIEST Shibpur, Howrah 711103. Prepare an application letter on plain paper and take a recent bio-data. There is no online form or email submission route stated in the notice, so your physical attendance and complete papers are essential.
Bring self-attested photocopies of mark sheets, certificates, work-experience proof and a valid identity document. Arrange them in the same order as your bio-data and keep originals available in case the institute wants to cross-check details. The notification says formal verification will happen at joining, and any mismatch can cancel the selection.
Before attending, review how your past work connects with analog circuits, mixed-signal design, FPGA development, coding, tape-out and IC testing. The project title combines hardware design with industrial IoT, safety and security, so be ready to explain both your core contribution and how you worked with a wider system or research team.
जिम्मेदारियाँ
- Design and evaluate analog and mixed-signal circuit blocks for the project
- Develop FPGA or embedded prototypes for the SoC-based IoT system
- Write and test code needed for hardware integration and experiments
- Support chip tape-out preparation, validation and IC testing activities
- Record design choices, test results and project progress clearly
- Coordinate research tasks with the principal investigator and project team
पात्रता मानदंड
न्यूनतम योग्यता
M.Tech with 7.0 CGPA and one year of experience in Analog and Mixed Signal Design, subject to institute norms.
वांछित योग्यता
Experience in Analog and Mixed Signal Design, FPGA, coding, chip tape-out and IC testing.
आवश्यक कौशल
Analog and mixed-signal design, FPGA development, coding, chip tape-out and IC testing.
आयु सीमा
18 - 35 वर्ष
आयु में छूट:
- SC/ST/OBC/Women/PwD: 5 वर्ष
अनुभव
1.0 - कोई सीमा नहीं वर्ष
क्या मैं पात्र हूँ?
इस नौकरी की आयु एवं योग्यता के आधार पर त्वरित स्व-जाँच। यह केवल संकेतात्मक है — पुष्टि हमेशा आधिकारिक अधिसूचना से करें।
✓ आप पात्र प्रतीत होते हैं ⚠ सीमारेखा पर — आयु में छूट देखें ✗ आप पात्र नहीं हो सकते
- आप न्यूनतम आयु () से कम हैं।
- आप अधिकतम आयु () से अधिक हैं।
- सामान्य आयु सीमा () से अधिक, लेकिन आरक्षित वर्ग की छूट ( तक) के अंतर्गत आप पात्र हो सकते हैं।
- इस पद के लिए चयनित योग्यता से अधिक योग्यता आवश्यक है।
- योग्यता की स्वतः जाँच नहीं हो सकी — ऊपर दिए गए मानदंड देखें।
पश्चिम बंगाल में अनुसंधान नौकरियाँ पाएँ
एक टैप। मेल खाती अधिसूचना प्रकाशित होते ही सूचना पाएँ।
✓ आपको ये अलर्ट मिलेंगे।
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वेतन एवं भत्ते
वेतनमान
INR 30,000 per month (consolidated)
चयन प्रक्रिया
- 1 साक्षात्कार
- 2 दस्तावेज़ सत्यापन
आवेदन कैसे करें
आवेदन का माध्यम: ऑफ़लाइन
आधिकारिक आवेदन पोर्टल पर जाने के लिए "अभी आवेदन करें" बटन पर क्लिक करें।
आवश्यक दस्तावेज़:
- Application letter on plain paper
- Recent bio-data with valid email address and phone number
- Self-attested photocopies of mark sheets
- Self-attested photocopies of educational certificates
- Self-attested work-experience certificate
- Valid identity proof
अक्सर पूछे जाने वाले प्रश्न
The walk-in interview is on 9 September 2026 at 11:00 AM at the School of VLSI Technology, IIEST Shibpur.
You need an M.Tech with 7.0 CGPA and one year of experience in Analog and Mixed Signal Design, subject to institute norms.
Attend the walk-in at the School of VLSI Technology, IIEST Shibpur with a plain-paper application, bio-data and the prescribed self-attested documents.
The selected Project Associate-I will receive INR 30,000 per month as consolidated pay.
Selection is through a walk-in interview, followed by document verification at joining.
महत्वपूर्ण तिथियाँ
अधिसूचना
27 अग. 2026
आवेदन प्रारंभ
27 अग. 2026
आवेदन की अंतिम तिथि
09 सित. 2026
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